Six-state ring counter on the LA
Backfilled from a post on embedded.greygiant.com dated 2025-07-19.
What I tried
Built the ring counter from the notebook page: a 74LS163, a 74LS138, one 74LS00 section for the count-6 reset, and the NE555 lifted off the sequencer board. One breadboard, nothing else on it.
What I measured
Six states on the DSLogic, T0 to T5, one-hot, active low. Each state lasts about 60 ms, which is the 555. The seventh count shows as a reset pulse and it’s back at T0 on the next edge. No glitches on the decoder outputs at this speed.
Things I decided that day
- Memory map: 0x0000-0x0FFF for the control word table, 0x1000-0xFFFF for the program, two AT28C256s in parallel so each address gives a 16-bit word. Same ROM serves the control unit and the program counter. This didn’t last; by August the microcode has its own EEPROM pair.
- IR: two 74LS373s for a 16-bit instruction, LE off an inverted T1, transparent during the fetch and latched through the execute.
- If I ever need a seventh state, detect count 7 with a 74LS10 instead of count 6 with the ‘00.
- Data would stage through RAM on its way from ROM to a register. Also didn’t last.
What surprised me
I expected the next step to be more wire. It’s pencil and paper. The counter will step through any sequence I give it; what’s missing is what the instructions are (LOAD, ADD, OUT, HALT, JMP to start) and the control word for each phase of each one.
Next
Write the instruction set and the control words down before building anything else.