Byte Hamr Labs

Program counter: four '193s, worked on first power-up

/ DINO / updated 2026-09-10 / from dino-homebrew program-counter 74ls193 logic-analyser backfill

Backfilled from a post on embedded.greygiant.com dated 2025-07-31.

What I tried

The 16-bit program counter. Four 74LS193s cascaded through their carry and borrow pins, so it counts up, counts down and loads a preset. 74LS245s on both sides: one pair to load a value in off the bus, one pair to put the count out on the bus, with the enables coming from the control word. A 74LS02 does the inversions the ‘193 wants.

Two passes at the schematic. The first had a 74LS32 OR in the PC_MUX decode; the control word already produced that state, so it came out. The second pass also fixed the DIR pins on the output transceivers, which I’d had backwards.

Program counter sheet, Dino v0.0.2: four 74LS193s cascaded, '245s on the load side and the output side, a '02 for the inversions.
Program counter sheet, Dino v0.0.2: four 74LS193s cascaded, ‘245s on the load side and the output side, a ‘02 for the inversions.

Before wiring I wrote down what a pass looks like: preset loads, increment carries across all four stages, decrement borrows across all four, PC_MUX turns the output transceivers on and off, the counter keeps counting with its outputs disabled, and it covers the full 16 bits.

Wiring: I pre-fitted Dupont jumpers to find routing conflicts before cutting solid wire. Putting the input and output transceivers in alternating order meant every cascade stage was wired identically.

The PC board wired. Alternating input and output transceivers made every cascade stage route the same way.
The PC board wired. Alternating input and output transceivers made every cascade stage route the same way.

What I measured

All 16 bits on the LA. It counted on the first power-up. Carry and borrow ripple through all four stages, no glitches on the bus at this clock.

Sixteen channels on the PC's output bus counting up off the 555. Carry ripples through all four '193s.
Sixteen channels on the PC’s output bus counting up off the 555. Carry ripples through all four ‘193s.
PC board under the LA with the ring counter board alongside feeding it a clock.
PC board under the LA with the ring counter board alongside feeding it a clock.

What broke or surprised me

Next

The T0 and T1 decoders for the universal fetch: ROM to IR under the PC’s address, then IR plus ring counter state forming the microcode ROM address. That’s the bootstrap, so the machine fetches its first instruction without anyone touching a switch.