Byte Hamr Labs

PicoPort: bare-metal SmartPort on a Pico W, reads solid, writes kind of

/ Byte Hamr / updated 2026-09-11 / from project_byte_hamr picoport smartport pico sd-card

What I tried

I wanted to work directly against the SmartPort protocol with control over every byte and every microsecond, without the FujiNet firmware in between. A Raspberry Pi Pico W: the PIO state machines do the FM encode and decode at 250 kbps with cycle-accurate timing, and the ARM cores do packet parsing, SD card I/O and the protocol state machine. There is no RTOS and no WiFi stack in it. It serves .2mg images from an SD card. The code is under software/SMARTPORT in the repo.

The Pico W on the breadboard, ribbon cable from the card's header.
The Pico W on the breadboard, ribbon cable from the card’s header.
The whole rig. The bags of capacitors are the signal integrity work in progress.
The whole rig. The bags of capacitors are the signal integrity work in progress.
Merlin 8 2.58 booted from a .2mg on the Pico's SD card.
Merlin 8 2.58 booted from a .2mg on the Pico’s SD card.

What I measured

What broke or surprised me

Writes occasionally corrupt the image. A garbled block number on a read is a retry. A garbled block number on a write scribbles 512 bytes to the wrong spot in the .2mg. Ask me how I know. The cause is the breadboard: 250 kbps FM signals on jumper wires with shared ground returns ring and crosstalk. I went through the usual dance of cap values, pull-ups and pull-downs, and moving wires. The firmware now verifies the RX checksum and rejects corrupted command packets before they can do damage, and the SD layer retries with escalating backoff when SPI hiccups.

Next

Solder the Pico to perfboard to stabilize the SD SPI bus. Then Rev 2 of the card, with an IDC40 header and ground pins interleaved between signals instead of the 13-pin header. The longer plan is boot to RAM: at power-on the Pico loads the .2mg into the card’s 64 MB SDRAM over SPI, the FPGA serves SmartPort reads and writes from SDRAM, and the Pico only writes dirty blocks back to SD. The SmartPort device protocol that is C on the Pico becomes a Verilog state machine behind the IWM, and the FM signals never leave the chip.